AArch64 MP+dmb.sy+ctrlisb-[fr-rf]-addr-ctrl-pos
"DMB.SYdWW Rfe DpCtrlIsbdR FrLeave RfBack DpAddrdR DpCtrldR PosRR Fre"
Cycle=Rfe DpCtrlIsbdR FrLeave RfBack DpAddrdR DpCtrldR PosRR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpAddrdR DpCtrldR DpCtrlIsbdR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpCtrlIsbdR FrLeave RfBack DpAddrdR DpCtrldR PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X7=a; 1:X9=x;
2:X1=z;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDR W0,[X1] | MOV W0,#1 ;
STR W0,[X1] | CBNZ W0,LC00 | STR W0,[X1] ;
DMB SY | LC00: | ;
MOV W2,#1 | ISB | ;
STR W2,[X3] | LDR W2,[X3] | ;
| LDR W4,[X3] | ;
| EOR W5,W4,W4 | ;
| LDR W6,[X7,W5,SXTW] | ;
| CBNZ W6,LC01 | ;
| LC01: | ;
| LDR W8,[X9] | ;
| LDR W10,[X9] | ;
Observed
z=1; y=1; x=1; 1:X8=1; 1:X4=1; 1:X2=1; 1:X10=0; 1:X0=0;
and z=1; y=1; x=1; 1:X8=1; 1:X4=0; 1:X2=0; 1:X10=0; 1:X0=0;